The so-called Moore’s law, promulgated by Intel’s co-founder Gordon Moore in the mid-60s, states that the number of transistors in an integrated circuit (or IC) doubles every two years. Contrary to what many media said and are still saying nowadays, the doubling of IC’s density doesn’t mean that semiconductor chips are twice as powerful every two years but rather that they relentlessly shrink in size, get more complex, consume less, work at faster speeds (higher frequency) and, most importantly, cost less every year.
All of these trends (size, complexity, speed, and price) lasted for decades and enabled the widespread adoption of electronic-based devices ranging from PCs to smartphones plus dozens of other devices that we use on a daily basis and that could not function without embedded semiconductor chips.
However, maintaining Moore’s law alive is getting more and more challenging as the industry is starting to reach the physical limits of materials and manufacturing processes. Many workarounds overcoming these technological challenges have been successfully tested and will be put into production in the coming years, putting the semiconductor industry on the verge of its biggest and most interesting technological jump since the 90s.
Let’s start this brief overview with the building block of any IC: the transistor. This basic element is a controlled switch that can be either ON (or 1 in binary) or OFF (0). Assembling transistors together creates logic gates, combining logic gates then results into functions and, finally, a set of functions makes up a microprocessor.
The physical structure of transistors currently in use (called FinFET) has remained unchanged for the past 15 years and is now starting to show its limits. In order to pursue the miniaturization trend, the industry is gradually adopting a new nanosheet-based architecture, called Gate-All-Around (GAA), that will enable the manufacturing of even smaller transistors able to switch at higher frequencies while consuming less energy.
Moving to GAA implies heavy investments to retool parts of the production chains, one of them being the critical lithographic process. (Photo)lithography is a process that uses light to transfer a geometric design (the structure of the transistor) from an optical mask to a light-sensitive chemical. Currently, state-of-the-art lithography machines are capable of printing FinFET transistors having a size of only 4 nanometers (a nanometer is a billionth of a meter, 10-9 m). As an illustration, Apple’s A16 chip, that powers the iPhone 14 family, packs more than 16 billion transistors “printed” on a silicon surface of slightly more than 100 mm2, roughly the size of a thumb.
The benefits provided by GAA transistors will be coupled to the next generation of lithography machines which are using Extreme Ultraviolet (or EUV) rays. Generating a constant EUV ray, powerful enough for semiconductor lithography, took almost 3 decades and billions of dollars in R&D for ASML Holding to master. The Dutch company is now working on the next iteration, called High-NA EUV (High Numerical Aperture), which will help the very few remaining players manufacturing leading edge chips (TSMC, Samsung and Intel) to enter the Ångström era – called after a Swedish physicist who pioneered spectroscopy – where transistors will shrink by a factor of 10 (1 Å = 10-10 m).
In addition to manufacturing breakthroughs like GAA and High-NA EUV, the semiconductor industry will also adopt a new manufacturing “philosophy” through the use of chiplets. In the past, the most complex chips like CPUs and GPUs were monolithic (one single silicon die). But, as the complexity of these chips has grown exponential, even the very smallest error in their design or manufacturing can have catastrophic (financial) consequences. The industry is hence disaggregating these monster chips into smaller parts called chiplets.
The advantages of chiplets are manyfold: notably a defect chiplet doesn’t render a whole chip useless and chiplets manufactured on different processes (or nodes) and designed by different companies can work together under the same “roof”. Concretely, this means that our future laptops will be, for example, powered by an AMD CPU, coupled to an Nvidia GPU and a Broadcom network chip all using the same Micron memory banks. All of these heterogeneous chiplets seamlessly interacting with each other and residing into a common package.
Another advantage of chiplets is that they will open the way to 3D-chips (already in use for NAND memory). The vertical stacking of chiplets is another trick to pack more features and computing power without increasing the chips’ footprint, a critical issue for mobile devices. 3D packaging is hence another manufacturing evolution that brings many new challenges like the physical interconnections between chiplets (called bonding) and their power supply. The industry has already defined a standard for the interoperability part (called Universal Chiplet Interconnect Express, UCIe) while the solutions to the manufacturing challenges are also on a good way with Intel’s PowerVia or TSMC’s hybrid-bonding technology.
Semiconductor equipment companies like Applied Materials, KLA, Lam Research or Axcelis just to name a very few of them, have a boulevard in front of them as capital expenditures will literally shoot to the roof in the coming years. These companies, which are either involved in etching (a process to remove material on a silicon wafer), metrology, testing or doping (modifying semiconducting properties), are all intensively researching new materials/processes and heavily relying on data and machine learning algorithms to optimize and further improve the performances of their machines.
All the fundamental changes currently occurring in the semiconductor industry are quite mind-boggling. The non-exhaustive list of tricks and breakthroughs mentioned above will maintain this more than 50-year-old law alive, profoundly impacting many facets of the semiconductor industry both on the design and the manufacturing sides.
After a disastrous year for the industry (a consequence of the Covid IT “boom”), we are finally starting to see green shoots at Taiwanese manufacturers and chip designers that are clearly stating that the inventory correction is coming to an end and that customers’ orders are gradually coming back on substrates, printed circuit boards, discrete electronic components as well as finished products like laptops and smartphones.
The appetite for computing power is insatiable as the complexity of Deep Learning models (think ChatGPT) is growing faster than Moore’s law. By the 2030 horizon, the geostrategic semiconductor industry will enter the “trillion era”: 1 trillion US dollars in annual revenue (McKinsey estimates) and 1 trillion transistors’ chips.
